Abstract: In this paper, we present a new hybrid optical burst switch architecture (HOBS) that takes advantage of the pre-transmission idle
time during lightpath establishment. In dynamic circuit switching (wavelength routing) networks, capacity is immediately hardreserved
upon the arrival of a setup message at a node, but it is used at least a round-trip time delay later. This waste of resources
is significant in optical multi-gigabit networks and can be used to transmit traffic of a lower class of service in a non-competing
way. The proposed hybrid OBS architecture, takes advantage of this idle time to transmit one-way optical bursts of a lower class of
service, while high priority data explicitly requests and establishes end-to-end lightpaths. In the proposed scheme, the two control
planes (two-way and one-way OBS reservation) are merged, in the sense that each SETUP message, used for the two-way lightpath
establishment, is associated with one-way burst transmission and therefore it is modified to carry routing and overhead information
for the one-way traffic as well. In this paper, we present the main architectural features of the proposed hybrid scheme and further
we assess its performance by conducting simulation experiments on the NSF net backbone topology. The extensive network study
revealed that the proposed hybrid architecture can achieve and sustain an adequate burst transmission rate with a finite worst case
delay.
Abstract: In this paper, a novel configuration is proposed for
the implementation of an almost all-optical switch architecture
called the scheduling switch, which when combined with appropriate
wait-for-reservation or tell-and-go connection and flow
control protocols provides lossless communication for traffic
that satisfies certain smoothness properties. An all-optical 2 2
exchange/bypass (E/B) switch based on the nonlinear operation
of a semiconductor optical amplifier (SOA) is considered as the
basic building block of the scheduling switch as opposed to active
SOA-based space switches that use injection current to switch
between ON and OFF states. The experimental demonstration of
the optically addressable 2 2 E/B, which is summarized for
10–Gb/s data packets as well as synchronous digital hierarchy
(SDH)/STM-64 data frames, ensures the feasibility of the proposed
configuration at high speeds, with low switching energy and low
losses during the scheduling process. In addition, it provides
reduction of the number of required components for the construction
of the scheduling switch, which is calculated to be 50% in the
number of active elements and 33% in the fiber length.
Abstract: In this paper, we present a Programmable Packet Processing Engine suitable for deep header processing in high-speed networking systems.
The engine, which has been – fabricated as part of a complete network processor, consists of a typical RISC-CPU, whose register
Wle has been modiWed in order to support eYcient context switching, and two simple special-purpose processing units. The engine can be
used in a number of network processing units (NPUs), as an alternative to the typical design practice of employing a large number of simple
general purpose processors, or in any other embedded system designed to process mainly network protocols. To assess the performance
of the engine, we have proWled typical networking applications and a series of experiments were carried out. Further, we have
compared the performance of our processing engine to that of two widely used NPUs and show that our proposed packet-processing
engine can run speciWc applications up to three times faster. Moreover, the engine is simpler to be fabricated, less complex in terms of
hardware complexity, while it can still be very easily programmed.
Abstract: The objective of this research is to propose two new optical procedures for packet routing and forwarding in the framework of transparent optical networks. The single-wavelength label-recognition and packet-forwarding unit, which represents the central physical constituent of the switching node, is fully described in both cases. The first architecture is a hybrid opto-electronic structure relying on an optical serial-to-parallel converter designed to slow down the label processing. The remaining switching operations are done electronically. The routing system remains transparent for the packet payloads. The second architecture is an all-optical architecture and is based on the implementation of all-optical decoding of the parallelized label. The packet-forwarding operations are done optically. The major subsystems required in both of the proposed architectures are described on the basis of nonlinear effects in semiconductor optical amplifiers. The experimental results are compatible with the integration of the whole architecture. Those subsystems are a 4-bit time-to-wavelength converter, a pulse extraction circuit, a an optical wavelength generator, a 3 x 8 all-optical decoder and a packet envelope detector.
Abstract: This paper describes recent research activities and results in the area of photonic switching
carried out within the Virtual Department on Switching (VDS) of the European e-Photon/
ONe Network of Excellence. Contributions from outstanding European research groups in
this field are collected to offer a platform for future research in optical switching. The paper
contains the main topics related to network scenarios, switch architectures and experiments,
with an effort to investigate synergies and challenging opportunities for collaboration
and integration of research expertise in the field.
Abstract: This paper presents a theoretical and experimental
analysis of saturated semiconductor optical amplifier (SOA)-based
interferometric switching arrangements. For the first time, it is
shown that such devices can provide enhanced intensity modulation
reduction to return-to-zero (RZ) formatted input pulse trains,
when the SOA is saturated with a strong continuous-wave (CW)
input signal. A novel theoretical platform has been developed in
the frequency domain, which reveals that the intensity modulation
of the input pulse train can be suppressed by more than 10 dB at
the output. This stems from the presence of the strong CW signal
that transforms the sinusoidal transfer function of the interferometric
switch into an almost flat, strongly nonlinear curve. This
behavior has also been verified experimentally for both periodically
and randomly degraded, in terms of intensity modulation,
signals at 10 Gb/s using the ultrafast nonlinear interferometer as
the switching device. Performance analysis both in the time and
frequency domains is demonstrated, verifying the concept and its
theoretical analysis.